Sfoglia per Rivista
Is your bus arbiter really fair? Restoring fairness in axi interconnects for FPGA SOCs
2019-01-01 Restuccia, Francesco; Pagani, M.; Biondi, A.; Marinoni, M.; Buttazzo, G.
Minimizing CPU energy in real-time systems with discrete speed management
2009-01-01 Bini, Enrico; Buttazzo, Giorgio Carlo; Lipari, Giuseppe
Minimizing CPU energy in real-time systems with discrete speed management
2009-01-01 Bini, Enrico; Buttazzo, Giorgio Carlo; Lipari, Giuseppe
Minimizing stack and communication memory usage in real-time embedded applications
2014-01-01 Zeng, Haibo; DI NATALE, Marco; Zhu, Qi
Multi-Criteria Optimization of Real-Time DAGs on Heterogeneous Platforms under P-EDF
2023-01-01 Cucinotta, Tommaso; Amory, Alexandre; Ara, Gabriele; Paladino, Francesco; Natale, Marco Di
Optimal Priority Assignment to Control Tasks
2014-01-01 Giulio Mose, Mancuso; Bini, Enrico; Gabriele, Pannocchia
Optimization of Task Allocation and Priority Assignment in Hard Real-Time Distributed Systems
2012-01-01 Q., Zhu; H., Zeng; W., Zheng; DI NATALE, Marco; A., Sangiovanni Vincentelli
Partitioning and selection of data consistency mechanisms for multicore real-time systems
2019-01-01 Al-Bayati, Z.; Sun, Y.; Zeng, H.; Di Natale, M.; Zhu, Q.; Meyer, B. H.
A robust mechanism for adaptive scheduling of multimedia applications
2011-01-01 Cucinotta, Tommaso; Abeni, Luca; Luigi, Palopoli; Lipari, Giuseppe
Weakly hard schedulability analysis for fixed priority scheduling of periodic real-time tasks
2017-01-01 Sun, Youcheng; Di Natale, Marco
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