Sfoglia per Autore
Real-Time Analysis and Design of a Dual Protocol Support for Bluetooth LE Devices
2017-01-01 Marinoni, Mauro; Biondi, Alessandro; Buonocunto, Pasquale; Franchino, Gianluca; Cesarini, Daniel; Buttazzo, Giorgio Carlo
Response-Time Analysis of Engine Control Applications under Fixed-Priority Scheduling
2017-01-01 Biondi, Alessandro; Di Natale, Marco; Buttazzo, Giorgio
Semi-Partitioned Scheduling of Dynamic Real-Time Workload: A Practical Approach Based on Analysis-Driven Load Balancing
2017-01-01 Casini, Daniel; Biondi, Alessandro; Buttazzo, Giorgio Carlo
A Framework for Supporting Real-Time Applications on Dynamic Reconfigurable FPGAs
2017-01-01 Biondi, Alessandro; Balsini, Alessio; Pagani, Marco; Rossi, Enrico; Marinoni, Mauro; Buttazzo, Giorgio Carlo
Constant bandwidth servers with constrained deadlines
2017-01-01 Casini, Daniel; Abeni, Luca; Biondi, Alessandro; Cucinotta, Tommaso; Buttazzo, Giorgio
Timing-Aware FPGA partitioning for real-Time applications under dynamic partial reconfiguration
2017-01-01 Biondi, Alessandro; Buttazzo, Giorgio
Supporting temporal and spatial isolation in a hypervisor for ARM multicore platforms
2018-01-01 Modica, Paolo; Biondi, Alessandro; Buttazzo, Giorgio Carlo; and Anup Patel,
Selecting the Transition Speeds of Engine Control Tasks to Optimize the Performance
2018-01-01 Biondi, Alessandro; Natale, Marco Di; Buttazzo, Giorgio C.; Pazzaglia, Paolo
On the ineffectiveness of 1/m-based interference bounds in the analysis of global EDF and FIFO scheduling
2018-01-01 Biondi, Alessandro; Sun, Youcheng
Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling
2018-01-01 Casini, Daniel; Biondi, Alessandro; Buttazzo, Giorgio Carlo
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone
2018-01-01 Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio Carlo
Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm
2018-01-01 Biondi, Alessandro; DI NATALE, Marco
A survey of schedulability analysis techniques for rate-dependent tasks
2018-01-01 Feld, Timo; Biondi, Alessandro; Davis, Robert I.; Buttazzo, Giorgio; Slomka, Frank
A design flow for supporting component-based software development in multiprocessor real-time systems
2018-01-01 Biondi, Alessandro; Buttazzo, Giorgio; Bertogna, Marko
Modeling and Analysis of Engine Control Tasks Under Dynamic Priority Scheduling
2018-01-01 Biondi, Alessandro; Buttazzo, Giorgio
Beyond the weakly hard model: Measuring the performance cost of deadline misses
2018-01-01 Pazzaglia, Paolo; Pannocchi, Luigi; Biondi, Alessandro; DI NATALE, Marco
Flora: Floorplan optimizer for reconfigurable areas in FPGAs
2019-01-01 Seyoum, B. B.; Biondi, A.; Buttazzo, G. C.
Simple and General Methods for Fixed-Priority Schedulability in Optimization Problems
2019-01-01 Pazzaglia, P; Biondi, A; Di Natale, M
Is your bus arbiter really fair? Restoring fairness in axi interconnects for FPGA SOCs
2019-01-01 Restuccia, Francesco; Pagani, M.; Biondi, A.; Marinoni, M.; Buttazzo, G.
Optimizing the Functional Deployment on Multicore Platforms with Logical Execution Time
2019-01-01 Pazzaglia, Paolo; Biondi, Alessandro; DI NATALE, Marco
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