BIONDI, ALESSANDRO

BIONDI, ALESSANDRO  

Istituto di Tecnologie della Comunicazione, dell'Informazione e della Percezione  

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Risultati 1 - 20 di 79 (tempo di esecuzione: 0.016 secondi).
Titolo Data di pubblicazione Autore(i) File
Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm 1-gen-2018 Biondi, Alessandro; DI NATALE, Marco
The ampere project: A model-driven development framework for highly parallel and energy-efficient computation supporting multi-criteria optimization 1-gen-2020 Quinones, E.; Royuela, S.; Scordino, C.; Gai, P.; Pinho, L. M.; Nogueira, L.; Rollo, J.; Cucinotta, T.; Biondi, A.; Hamann, A.; Ziegenbein, D.; Saoud, H.; Soulat, R.; Forsberg, B.; Benini, L.; Mando, G.; Rucher, L.
Analyzing Arm's MPAM From the Perspective of Time Predictability 1-gen-2022 Zini, M.; Casini, D.; Biondi, A.
Analyzing parallel real-time tasks implemented with thread pools 1-gen-2019 Casini, D.; Biondi, A.; Buttazzo, G.
ARTE: Arduino real-time extension for programming multitasking applications 1-gen-2016 Buonocunto, Pasquale; Biondi, Alessandro; Pagani, Marco; Marinoni, Mauro; Buttazzo, Giorgio Carlo
ARTe: Providing real-time multitasking to Arduino 1-gen-2022 Restuccia, F.; Pagani, M.; Mascitti, A.; Barrow, M.; Marinoni, M.; Biondi, A.; Buttazzo, G.; Kastner, R.
Automating the design flow under dynamic partial reconfiguration for hardware-software co-design in FPGA SoC 1-gen-2021 Seyoum, Biruk; Pagani, Marco; Biondi, Alessandro; Buttazzo, Giorgio
AXI HyperConnect: A predictable, hypervisor-level interconnect for hardware accelerators in FPGA SoC 1-gen-2020 Restuccia, F.; Biondi, A.; Marinoni, M.; Cicero, G.; Buttazzo, G.
A bandwidth reservation mechanism for axi-based hardware accelerators on FPGAs 1-gen-2019 Pagani, M.; Rossi, E.; Biondi, A.; Marinoni, M.; Lipari, G.; Buttazzo, G.
Beyond the weakly hard model: Measuring the performance cost of deadline misses 1-gen-2018 Pazzaglia, Paolo; Pannocchi, Luigi; Biondi, Alessandro; DI NATALE, Marco
A Blocking Bound for Nested FIFO Spin Locks 1-gen-2017 Biondi, Alessandro; Brandenburg, Björn B.; Wieder, Alexander
Constant bandwidth servers with constrained deadlines 1-gen-2017 Casini, Daniel; Abeni, Luca; Biondi, Alessandro; Cucinotta, Tommaso; Buttazzo, Giorgio
A design flow for supporting component-based software development in multiprocessor real-time systems 1-gen-2018 Biondi, Alessandro; Buttazzo, Giorgio; Bertogna, Marko
Detecting Adversarial Examples by Input Transformations, Defense Perturbations, and Voting 1-gen-2021 Nesti, Federico; Biondi, Alessandro; Buttazzo, Giorgio
Dual-protocol support for Bluetooth LE devices 1-gen-2015 Marinoni, Mauro; Franchino, Gianluca; Cesarini, Daniel; Biondi, Alessandro; Buonocunto, Pasquale; Buttazzo, Giorgio Carlo
Engine Control: Task Modeling and Analysis 1-gen-2015 Biondi, Alessandro; Buttazzo, Giorgio Carlo
Evaluating the Robustness of Semantic Segmentation for Autonomous Driving against Real-World Adversarial Patch Attacks 1-gen-2022 Nesti, Federico; Rossolini, Giulio; Nair, Saasha; Biondi, Alessandro; Buttazzo, Giorgio Carlo
Event-driven delay-induced tasks: Model, analysis, and applications 1-gen-2021 Aromolo, F.; Biondi, A.; Nelissen, G.; Buttazzo, G.
Exact Interference of Adaptive Variable-Rate Tasks under Fixed-Priority Scheduling 1-gen-2014 Biondi, Alessandro; Melani, Alessandra; Marinoni, Mauro; DI NATALE, Marco; Buttazzo, Giorgio Carlo
Feasibility Analysis of Engine Control Tasks under EDF Scheduling 1-gen-2015 Biondi, Alessandro; Buttazzo, Giorgio Carlo; Simoncelli, Stefano