We present a vision for the hybrid integration of advanced transceivers at 1.3 μm wavelength, and the progress done towards this vision in the EU-funded RAPIDO project. The final goal of the project is to make five demonstrators that show the feasibility of the proposed concepts to make optical interconnects and packet-switched optical networks that are scalable to Pb/s systems in data centers and high performance computing. Simplest transceivers are to be made by combining directly modulated InP VCSELs with 12 μm SOI multiplexers to launch, for example, 200 Gbps data into a single polymer waveguide with 4 channels to connect processors on a single line card. For more advanced transceivers we develop novel dilute nitride amplifiers and modulators that are expected to be more power-efficient and temperatureinsensitive than InP devices. These edge-emitting III-V chips are flip-chip bonded on 3 μm SOI chips that also have polarization and temperature independent multiplexers and low-loss coupling to the 12 μm SOI interposers, enabling to launch up to 640 Gbps data into a standard single mode (SM) fiber. In this paper we present a number of experimental results, including low-loss multiplexers on SOI, zero-birefringence Si waveguides, micron-scale mirrors and bends with 0.1 dB loss, direct modulation of VCSELs up to 40 Gbps, ±0.25μm length control for dilute nitride SOA, strong band edge shifts in dilute nitride EAMs and SM polymer waveguides with 0.4 dB/cm loss.
|Titolo:||Integrating III-V, Si, and polymer waveguides for optical interconnects: RAPIDO|
|Autori interni:||MALACARNE, Antonio|
|Data di pubblicazione:||2016|
|Rivista:||PROCEEDINGS OF SPIE, THE INTERNATIONAL SOCIETY FOR OPTICAL ENGINEERING|
|Appare nelle tipologie:||4.1 Contributo Atti Congressi/Articoli in extenso|