The utilization of Ethernet in the cellular terrestrial cloud radio access network (C-RAN) fronthaul is considered as a way for improving C-RAN network reconfigurability and efficiency in terms of both capital and operational expenditures. Moreover CPRI line bit rate dynamic reconfiguration may spare further capital expenditures by avoiding a peak traffic capacity allocation. A possible solution for introducing Ethernet in the fronthaul is the encapsulation of Common Packet Radio Interface (CPRI) over Ethernet. However, it must be assured that CPRI strict requirements on delay and jitter are still met. In this work the combined impact of encapsulating CPRI on Ethernet and of the dynamic CPRI line bit rate reconfiguration on delay and jitter is evaluated. The evaluation is both analytical and based on the pre-synthesis emulation of dynamic CPRI line bit rate reconfiguration. Results show that dynamic CPRI line bit rate reconfiguration can be achieved within about one millisecond. However, if a size-based encapsulation of CPRI over Ethernet is utilized, dynamic CPRI line bit rate reconfiguration might cause delay variations (i.e., jitter) up to few microseconds.

Analytical and experimental evaluation of CPRI over Ethernet dynamic rate reconfiguration

VALCARENGHI, LUCA;KONDEPU, KOTESWARARAO;CASTOLDI, Piero
2016-01-01

Abstract

The utilization of Ethernet in the cellular terrestrial cloud radio access network (C-RAN) fronthaul is considered as a way for improving C-RAN network reconfigurability and efficiency in terms of both capital and operational expenditures. Moreover CPRI line bit rate dynamic reconfiguration may spare further capital expenditures by avoiding a peak traffic capacity allocation. A possible solution for introducing Ethernet in the fronthaul is the encapsulation of Common Packet Radio Interface (CPRI) over Ethernet. However, it must be assured that CPRI strict requirements on delay and jitter are still met. In this work the combined impact of encapsulating CPRI on Ethernet and of the dynamic CPRI line bit rate reconfiguration on delay and jitter is evaluated. The evaluation is both analytical and based on the pre-synthesis emulation of dynamic CPRI line bit rate reconfiguration. Results show that dynamic CPRI line bit rate reconfiguration can be achieved within about one millisecond. However, if a size-based encapsulation of CPRI over Ethernet is utilized, dynamic CPRI line bit rate reconfiguration might cause delay variations (i.e., jitter) up to few microseconds.
2016
9781479966646
9781479966646
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11382/513137
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