We present the first FPGA implementation of the Two-Step Scheduler framework for modular optical interconnection networks. The longest-queue-first scheduling algorithm guarantees the lowest latency, while the iSLIP algorithm minimizes the hardware resources and scheduling duration.
Hardware Comparison of Schedulers for Modular Optical Interconnection Networks
BORROMEO, JUSTINE CRIS;Castoldi P.;Andriolli N.
2019-01-01
Abstract
We present the first FPGA implementation of the Two-Step Scheduler framework for modular optical interconnection networks. The longest-queue-first scheduling algorithm guarantees the lowest latency, while the iSLIP algorithm minimizes the hardware resources and scheduling duration.File in questo prodotto:
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